/******************************************************************************
 * Copyright 2013-2014 Espressif Systems (Wuxi)
 *
 * FileName: user_light.c
 *
 * Description: light demo's function realization
 *
 * Modification history:
 *     2014/5/1, v1.0 create this file.
*******************************************************************************/
#include "ets_sys.h"
#include "osapi.h"
#include "os_type.h"
#include "mem.h"
#include "user_interface.h"
#include "gpio.h"
#include "driver/hw_timer.h"

#include "light_pwm.h"
#include "user_dbg.h"

#if EP_PRJ_LIGHT_PWM
#define MIN(x, y)	((x)<(y)?(x):(y))
#define MAX(x, y)	((x)>(y)?(x):(y))

// different cross zero wave. 1:always. 2:no-load/full-load/pwm affect zero. A:pulse. B:square wave
// 1+A; 1+B; 2+A.
// for one pulse every zero, 100Hz pulse, use Hi level to capture cross-zero.
// 50Hz square wave means one edge every zero, use both P/N edge to capture.
// default: anyedge. disable the macro INT_HILEVEL.
#define CROSS_ZERO_INT_HILEVEL
//	#define CROSS_ZERO_INT_POSEDGE

#define PWLDEV_INT_USE_MESSAGE
#define SHINE_DISABLE_INT
#if defined(PRJ_EMH02DE_V1)
#define POWER_ON_AT_FRONT
#endif
// after power on or reset, wait for a while to count the pulse period. microsecond
#define PWLDEV_CALCULATE_PERIOD_DELAY	1000

#define LOG_CROSS_ZERO_TRIGGER	// test code, record the time of every cross zero when calculate the period

#define AP_SSID			"MyIoTDemo"
#define AP_PASSWORD	"12345678"
#define WEB_SERVER_PORT   80

#define PWM_CHANNEL	1
#define PWM_0_OUT_IO_MUX PERIPHS_IO_MUX_GPIO4_U
#define PWM_0_OUT_IO_NUM 4
#define PWM_0_OUT_IO_FUNC  FUNC_GPIO4

#define KEY_NUM            1
#define KEY_0_IO_MUX     PERIPHS_IO_MUX_MTDI_U
#define KEY_0_IO_NUM     12
#define KEY_0_IO_FUNC    FUNC_GPIO12

#define CROSS_ZERO_IO_MUX     PERIPHS_IO_MUX_MTMS_U
#define CROSS_ZERO_IO_NUM     14
#define CROSS_ZERO_IO_FUNC    FUNC_GPIO14

#define FB_IO_MUX     PERIPHS_IO_MUX_MTCK_U
#define FB_IO_NUM     13
#define FB_IO_FUNC    FUNC_GPIO13
#define RESET_IO_MUX     PERIPHS_IO_MUX_MTDO_U
#define RESET_IO_NUM     15
#define RESET_IO_FUNC    FUNC_GPIO15
#define LED_IO_MUX     PERIPHS_IO_MUX_GPIO5_U
#define LED_IO_NUM     5
#define LED_IO_FUNC    FUNC_GPIO5

typedef enum {
    WORK_INIT = 0,
	WORK_RESET_STAT,
	WORK_CALE_CROSS_ZERO,
	WORK_ON,
	WORK_OVERLOAD,
	WORK_UNLOAD,
	WORK_END
} PWLDEV_WORK_TYPE;

#define PWLDEV_STAT_BUFFSIZE		6
typedef union {
	uint8 stat_data[PWLDEV_STAT_BUFFSIZE];
	struct {
		uint8 data0;
		uint8 data1;
		uint8 cmdtype;
		uint8 onoff;
		uint8 light;
				
		uint8 checksum;
	} stat_cfg;
} pwldev_work_status;
LOCAL pwldev_work_status pwldev_setting;

LOCAL os_timer_t pwldev_pwm_timer;
LOCAL os_timer_t pwldev_work_timer;
os_event_t    pwldev_procTaskQueue[PWLDEV_PROCTASK_QUEUELEN];
#if defined(LOG_CROSS_ZERO_TRIGGER) /* added macro LOG_CROSS_ZERO_TRIGGER */
#define CROSS_ZERO_LOG_MAX	200
LOCAL uint32 cross_zero_tick[CROSS_ZERO_LOG_MAX]={0};
#endif /* LOG_CROSS_ZERO_TRIGGER */
LOCAL uint32 last_trigger_time = 0, current_trigger_time = 0;
LOCAL uint32 cross_zero_period_min = 0;
LOCAL uint32 cross_zero_period_max = 0;
LOCAL uint16 cross_zero_tick_count = 0;
LOCAL uint8 device_work_state = 0;
LOCAL uint8 light_ctrl_start = 0;


extern void user_webserver_init(uint32 port);
LOCAL void pwldev_start_reset(void);

#define pwldev_set_work_stat(stat)	device_work_state = stat

/******************************************************************************
* Function
*******************************************************************************/

/******************************************************************************
 * FunctionName : user_ch_aircon_get_mode
 * Description  : get mode
 * Parameters   : NONE
 * Returns      : uint8 : 
*******************************************************************************/
uint8 ICACHE_FLASH_ATTR
pwldev_get_cfg_onoff(void)
{
	return pwldev_setting.stat_cfg.onoff;
}

uint8 ICACHE_FLASH_ATTR
pwldev_get_cfg_light(void)
{
	return pwldev_setting.stat_cfg.light;
}

uint8 ICACHE_FLASH_ATTR
pwldev_get_cfg_fb(void)
{
	return GPIO_INPUT_GET(GPIO_ID_PIN(FB_IO_NUM));
}

void ICACHE_FLASH_ATTR
pwldev_set_cfg_onoff(uint8 on)
{
	pwldev_setting.stat_cfg.onoff = on;	
}

void ICACHE_FLASH_ATTR
pwldev_set_cfg_light(uint8 light)
{
	pwldev_setting.stat_cfg.light = light;
}

void ICACHE_FLASH_ATTR
pwldev_set_cfg_reset(uint8 reset_level)
{
	pwldev_setting.stat_cfg.data1 = reset_level;
}
void ICACHE_FLASH_ATTR
pwldev_set_cfg_stoptick(uint8 value)
{
	pwldev_setting.stat_cfg.data0 = value;
}
uint8 ICACHE_FLASH_ATTR
pwldev_get_cfg_stoptick(uint8 value)
{
	return pwldev_setting.stat_cfg.data0;
}

void ICACHE_FLASH_ATTR
pwldev_change_light_config(void)
{
	if(device_work_state != WORK_ON)
		return;
	os_timer_disarm(&pwldev_pwm_timer);
	os_timer_disarm(&pwldev_work_timer);
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
	GPIO_OUTPUT_SET(RESET_IO_NUM, pwldev_setting.stat_cfg.data1);
#endif /* PRJ_EMH02DE_V1 */
	os_printf("%s %d,%d\n",__func__, pwldev_setting.stat_cfg.onoff, pwldev_setting.stat_cfg.light);
}

#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
LOCAL void ICACHE_FLASH_ATTR
pwldev_check_unload_cb(void)
{
	EPIT_DBG("%s \n", __func__);
	os_timer_disarm(&pwldev_pwm_timer);
	os_timer_disarm(&pwldev_work_timer);
	pwldev_set_work_stat(WORK_UNLOAD);
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_DISABLE);
	pwldev_start_reset();
}

LOCAL void ICACHE_FLASH_ATTR
pwldev_overload_check_handle(void)
{
	uint32 gpio_status;
	gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
	if(gpio_status & BIT(CROSS_ZERO_IO_NUM))
	{
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
		if(1 == GPIO_INPUT_GET(GPIO_ID_PIN(CROSS_ZERO_IO_NUM)))
		{
#if defined(CROSS_ZERO_INT_HILEVEL) /* added macro CROSS_ZERO_INT_HILEVEL */
			gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_LOLEVEL);
#endif /* CROSS_ZERO_INT_HILEVEL */
		}
		else
		{
#if defined(CROSS_ZERO_INT_HILEVEL) /* added macro CROSS_ZERO_INT_HILEVEL */
			gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
#endif /* CROSS_ZERO_INT_HILEVEL */
		}
		os_timer_disarm(&pwldev_pwm_timer);
		os_timer_setfn(&pwldev_pwm_timer, (os_timer_func_t *)pwldev_check_unload_cb, NULL);
		os_timer_arm(&pwldev_pwm_timer, 100, 0);
		
#else
#endif /* PRJ_EMH02DE_V1 */
	}
	// Clear interrupt status
	GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status);
}

LOCAL void ICACHE_FLASH_ATTR
pwldev_goto_overload(void)
{
	EPIT_DBG("%s \n", __func__);
	os_timer_disarm(&pwldev_pwm_timer);
	os_timer_disarm(&pwldev_work_timer);
	ETS_GPIO_INTR_DISABLE();
	ETS_GPIO_INTR_ATTACH(pwldev_overload_check_handle, NULL);
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_ANYEDGE);
	ETS_GPIO_INTR_ENABLE();
	os_timer_disarm(&pwldev_pwm_timer);
	os_timer_setfn(&pwldev_pwm_timer, (os_timer_func_t *)pwldev_check_unload_cb, NULL);
	os_timer_arm(&pwldev_pwm_timer, 100, 0);
}

LOCAL void pwldev_pwm_handler_enable_int(void)
{
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
#endif /* SHINE_DISABLE_INT */
}

static void pwldev_pwm_handler_hi(void)
{
//		if(set_cfg_ins++<100)
//		{
//			EPIT_DBG("TMe%d\n",set_cfg_ins);
//		}
    GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
//		hw_timer_set_func(pwldev_pwm_handler);
	// TODO: the period of pulse
//		hw_timer_arm(cross_zero_period_min/10*(10-pwldev_setting.stat_cfg.light));
		light_ctrl_start = 0;
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
//		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
	hw_timer_set_func(pwldev_pwm_handler_enable_int);
	hw_timer_arm(100);
#endif /* SHINE_DISABLE_INT */
//	#if defined(SHINE_CROSS_ZERO_INT_HI) /* added macro SHINE_CROSS_ZERO_INT_HI */
//		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
//	#endif /* SHINE_CROSS_ZERO_INT_HI */
}

static void pwldev_pwm_handler(void)
{
//		if(set_cfg_ins++<100)
//		{
//			EPIT_DBG("TMe%d\n",set_cfg_ins);
//		}
//		GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
    GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 1);
	hw_timer_set_func(pwldev_pwm_handler_hi);
//		// TODO: the period of pulse
	sint32 hi_period=cross_zero_period_min/10*(pwldev_setting.stat_cfg.light);
//		hw_timer_arm(hi_period>1000?hi_period-1000:(hi_period>>1));
	uint32 stop_period = pwldev_setting.stat_cfg.data0 * 20;
	uint32 low_period = cross_zero_period_min/10*(10-pwldev_setting.stat_cfg.light);
	hi_period = cross_zero_period_min - low_period - stop_period;
	if(hi_period<200)
	{
		EPIT_DBG("too small hi\n");
		hi_period=260;
	}
	hw_timer_arm(hi_period);
//		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_POSEDGE);
	if(0 == GPIO_INPUT_GET(GPIO_ID_PIN(FB_IO_NUM)))
	{
		// pwm>1, fb<1, short circuit, overload. set pwm>0
		GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
		hw_timer_set_func(NULL);
		// check vin(cross_zero)
		
	}
}
#else
void pwldev_pwm_handler(void)
{
    GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 1);
}
#endif

LOCAL void ICACHE_FLASH_ATTR
pwldev_shine_handle_msg(uint32 par)
{
	uint32 stop_period;
	sint32 hi_period;
	uint32 time_delay;
	if(pwldev_setting.stat_cfg.onoff)
	{
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
//			if((1 == GPIO_INPUT_GET(GPIO_ID_PIN(CROSS_ZERO_IO_NUM))))
		{
			stop_period = pwldev_setting.stat_cfg.data0 * 20;
			hi_period=cross_zero_period_min/10*(pwldev_setting.stat_cfg.light);

#if defined(POWER_ON_AT_FRONT) /* added macro POWER_ON_AT_FRONT */
			GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 1);
			if(pwldev_setting.stat_cfg.light < 10)
			{
				time_delay = hi_period - stop_period;
			}
			else
			{
				time_delay = cross_zero_period_min - stop_period;
			}
			hw_timer_set_func(pwldev_pwm_handler_hi);
			hw_timer_arm(time_delay);
#else
			GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
			time_delay = cross_zero_period_min - hi_period;
			hw_timer_set_func(pwldev_pwm_handler);
			hw_timer_arm(time_delay);
#endif /* POWER_ON_AT_FRONT */
			light_ctrl_start = 1;
		}
		/*			
		*/			
		// reset timer to trigger unload state
		os_timer_disarm(&pwldev_pwm_timer);
		os_timer_setfn(&pwldev_pwm_timer, (os_timer_func_t *)pwldev_check_unload_cb, NULL);
		os_timer_arm(&pwldev_pwm_timer, 100, 0);
		if(0 == GPIO_INPUT_GET(GPIO_ID_PIN(FB_IO_NUM)) &&
			1 == GPIO_INPUT_GET(GPIO_ID_PIN(PWM_0_OUT_IO_NUM)))
		{
			gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_DISABLE);
			GPIO_OUTPUT_SET(RESET_IO_NUM, 0);
			GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
			pwldev_set_work_stat(WORK_OVERLOAD);
			os_timer_disarm(&pwldev_pwm_timer);
			os_timer_disarm(&pwldev_work_timer);
			os_timer_setfn(&pwldev_work_timer, (os_timer_func_t *)pwldev_goto_overload, NULL);
			os_timer_arm(&pwldev_work_timer, 2, 0);
		}
#else
		// light_v01 2016-8-8
		if(pwldev_setting.stat_cfg.light < 10)
		{
			hi_period=cross_zero_period_min/10*(pwldev_setting.stat_cfg.light);
			time_delay = cross_zero_period_min - hi_period;
			GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
			hw_timer_set_func(pwldev_pwm_handler);
			hw_timer_arm(time_delay);
		}
		else
		{
			GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 1);
		}

#endif /* PRJ_EMH02DE_V1 */
	}
	else
	{
		GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
		hw_timer_set_func(pwldev_pwm_handler_hi);
		hw_timer_arm(4000);
#endif /* SHINE_DISABLE_INT */
#endif /* PRJ_EMH02DE_V1 */
	}
}

#if defined(PWLDEV_INT_USE_MESSAGE)
uint8 led_stat= 0;
void pwldev_czero_shine(uint8 gpio_id)
{
	uint32 gpio_status;
	gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
	if(gpio_status & BIT(gpio_id))
	{
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_DISABLE);
#endif /* SHINE_DISABLE_INT */
		led_stat ^=1;
		GPIO_OUTPUT_SET(LED_IO_NUM, led_stat);
		system_os_post(PWLDEV_PROCTASK_PRIO, (os_signal_t)SIG_INT_TRIGGER, (os_param_t)0);
	}
	// Clear interrupt status
	GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status);
}
#else
void pwldev_czero_shine(uint8 gpio_id)
{
	uint32 gpio_status;
	gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
	if(gpio_status & BIT(gpio_id))
	{
		if(pwldev_setting.stat_cfg.onoff)
		{
			if(pwldev_setting.stat_cfg.light < 10)
			{
				GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
#if defined(PWLDEV_PWM_HW_TIMER) /* added macro PWLDEV_PWM_HW_TIMER */
				hw_timer_init(NMI_SOURCE, 0);
				hw_timer_set_func(pwldev_pwm_handler);
				// TODO: the period of pulse
				hw_timer_arm(1000*(10-pwldev_setting.stat_cfg.light));
#else
	os_timer_disarm(&pwldev_pwm_timer);
	os_timer_setfn(&pwldev_pwm_timer, (os_timer_func_t *)pwldev_pwm_handler, NULL);
	os_timer_arm_us(&pwldev_pwm_timer, 1000*(10-pwldev_setting.stat_cfg.light), 0);
#endif /* PWLDEV_PWM_HW_TIMER */
			}
			else
			{
				GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 1);
			}
		}
		else
		{
			GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
		}
	}
	// Clear interrupt status
	GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status);
}
#endif

LOCAL void pwldev_capture_int_enable_int(void)
{
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
#endif /* SHINE_DISABLE_INT */
}

LOCAL void ICACHE_FLASH_ATTR
pwldev_capture_int_handle_msg(void)
{
	uint32 cross_zero_period_value = 0;
	current_trigger_time = system_get_time();
	if(cross_zero_tick_count++>5)
	{
#if defined(LOG_CROSS_ZERO_TRIGGER) /* added macro LOG_CROSS_ZERO_TRIGGER */
		if(cross_zero_tick_count<CROSS_ZERO_LOG_MAX)
			cross_zero_tick[cross_zero_tick_count] = current_trigger_time;
#endif /* LOG_CROSS_ZERO_TRIGGER */
		cross_zero_period_value = current_trigger_time - last_trigger_time;
		if(cross_zero_period_min)
			cross_zero_period_min = MIN(cross_zero_period_min, cross_zero_period_value);
		else
			cross_zero_period_min = cross_zero_period_value;
		cross_zero_period_max = MAX(cross_zero_period_max, cross_zero_period_value);
	}
	last_trigger_time = current_trigger_time;
//				gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_LOLEVEL);
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
	hw_timer_set_func(pwldev_capture_int_enable_int);
	hw_timer_arm(4000);
#endif /* SHINE_DISABLE_INT */
}

LOCAL void ICACHE_FLASH_ATTR
pwldev_procTask(os_event_t *events)
{
	switch (events->sig) {
	case SIG_CAPTURE_INT:
		pwldev_capture_int_handle_msg();
		break;
	case SIG_INT_TRIGGER:
		pwldev_shine_handle_msg(events->par);
		break;
	case SIG_UART_GET_FRAME:
		break;
	case SIG_UART_UPDATE_STATUS:
		break;
	default:
		break;
	}
}

LOCAL void ICACHE_FLASH_ATTR
pwldev_task_init(void)
{
	system_os_task(pwldev_procTask, PWLDEV_PROCTASK_PRIO, pwldev_procTaskQueue, PWLDEV_PROCTASK_QUEUELEN);
}

LOCAL uint32 ICACHE_FLASH_ATTR
pwldev_start_work(void)
{
	EPIT_DBG("%s\n", __func__);
#if 0
	os_timer_disarm(&pwldev_work_timer);
	ETS_GPIO_INTR_DISABLE();
	ETS_GPIO_INTR_ATTACH(pwldev_czero_shine, CROSS_ZERO_IO_NUM);  // GPIO interrupt handler
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_ANYEDGE);
	ETS_GPIO_INTR_ENABLE();
	device_work_state = WORK_ON;
#endif
	os_timer_disarm(&pwldev_work_timer);

	ETS_GPIO_INTR_DISABLE();
	ETS_GPIO_INTR_ATTACH(pwldev_czero_shine, CROSS_ZERO_IO_NUM);  // GPIO interrupt handler
#if defined(SHINE_CROSS_ZERO_INT_HI) /* added macro SHINE_CROSS_ZERO_INT_HI */
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
//	#else
//		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_POSEDGE);
//	#endif /* SHINE_CROSS_ZERO_INT_HI */
#else
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_ANYEDGE);
#endif
	ETS_GPIO_INTR_ENABLE();

	pwldev_set_work_stat(WORK_ON);
	EPIT_DBG("reggpio%d=%x\n", CROSS_ZERO_IO_NUM, GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(CROSS_ZERO_IO_NUM))));
}

/******************************************************************************
* FunctionName : user_set_softap_config
* Description  : set SSID and password of ESP8266 softAP
* Parameters   : none
* Returns      : none
*******************************************************************************/
void ICACHE_FLASH_ATTR
user_set_softap_config(void)
{
	struct softap_config config;
	if(wifi_get_opmode() != SOFTAP_MODE)
		wifi_set_opmode(SOFTAP_MODE);
	os_memset(&config, 0, sizeof(config));
	wifi_softap_get_config(&config); // Get config first.

	os_sprintf(config.ssid, AP_SSID);
	os_sprintf(config.password, AP_PASSWORD);
	config.ssid_len = os_strlen(config.ssid);
	config.authmode = AUTH_WPA_WPA2_PSK;
	config.beacon_interval = 100;
	config.max_connection = 4; // how many stations can connect to ESP8266 softAP at most.

	wifi_softap_set_config(&config);// Set ESP8266 softap config .
}

LOCAL uint32 ICACHE_FLASH_ATTR
user_get_rtc_ms(void)
{
	uint32 cal2 = system_rtc_clock_cali_proc();
	// os_printf("cal 2 : %d.%d \r\n",((cal2*1000)>>12)/1000,
		// ((cal2*1000)>>12)%1000 );
	uint32 rtc_t2 = system_get_rtc_time();
	uint64 time_acc = ( ((uint64)(rtc_t2)) * ( (uint64)((cal2*1000)>>12)) ) ;
	return (uint32)(time_acc/1000000);
}

LOCAL void ICACHE_FLASH_ATTR
pwldev_check_cross_zero_tick(void)
{
#if defined(LOG_CROSS_ZERO_TRIGGER) /* added macro LOG_CROSS_ZERO_TRIGGER */
	uint8 i;
	for(i=0; i<(cross_zero_tick_count<CROSS_ZERO_LOG_MAX?cross_zero_tick_count:CROSS_ZERO_LOG_MAX); i++)
	{
		EPIT_DBG("zt[%02d]=%d\n", i, cross_zero_tick[i]);
	}
#endif /* LOG_CROSS_ZERO_TRIGGER */
	EPIT_DBG("cross_zero_period_min=%d,cross_zero_tick_count=%d\n", cross_zero_period_min,cross_zero_tick_count);
	EPIT_DBG("cross_zero_period_max=%d,cross_zero_tick_count=%d\n", cross_zero_period_max,cross_zero_tick_count);
	pwldev_start_work();
}

#if 0
// calculate AC is 50/60 Hz ?
void capture_cross_zero(uint8 gpio_id)
{
	uint32 gpio_status;
	gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
	if(gpio_status & BIT(gpio_id))
	{
#if defined(LOG_CROSS_ZERO_TRIGGER) /* added macro LOG_CROSS_ZERO_TRIGGER */
		cross_zero_tick[cross_zero_tick_count++] = system_get_time();
#endif /* LOG_CROSS_ZERO_TRIGGER */
		if(cross_zero_tick_count>=20)
		{
			gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_DISABLE);
			os_timer_disarm(&pwldev_pwm_timer);
			os_timer_setfn(&pwldev_pwm_timer, (os_timer_func_t *)pwldev_check_cross_zero_tick, NULL);
			os_timer_arm(&pwldev_pwm_timer, 10, 0);
		}
	}
	// Clear interrupt status
	GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status);
}

LOCAL uint32 ICACHE_FLASH_ATTR
pwldev_prepare_work(void)
{
	EPIT_DBG("%s\n", __func__);
	os_timer_disarm(&pwldev_work_timer);
	if(device_work_state == WORK_ON)
	{
		return;
	}
	else if(device_work_state == WORK_CALE_CROSS_ZERO)
	{
		EPIT_DBG("%s stop cap zero\n", __func__);
		ETS_GPIO_INTR_DISABLE();
		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_DISABLE);
		ETS_GPIO_INTR_ENABLE();
		pwldev_check_cross_zero_tick();
	}
	pwldev_start_work();
}
#endif

LOCAL void ICACHE_FLASH_ATTR
user_start(void)
{
	os_printf("%s\n", __func__);
#if 0
	os_timer_disarm(&pwldev_work_timer);
	os_timer_setfn(&pwldev_work_timer, (os_timer_func_t *)pwldev_prepare_work, NULL);
	os_timer_arm(&pwldev_work_timer, 1000, 0);
#endif
}

LOCAL uint32 ICACHE_FLASH_ATTR
pwldev_stop_capture_cross_zero(void)
{
	EPIT_DBG("%s\n", __func__);
	os_timer_disarm(&pwldev_work_timer);
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
	os_timer_disarm(&pwldev_pwm_timer);
#endif /* PRJ_EMH02DE_V1 */
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
	hw_timer_set_func(NULL);
#endif /* SHINE_DISABLE_INT */
	ETS_GPIO_INTR_DISABLE();
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_DISABLE);
	ETS_GPIO_INTR_ENABLE();
	if(cross_zero_period_min)
	{
		pwldev_check_cross_zero_tick();
	}
	else
	{
		// if no load, cross zero(vin) always high, cross_zero_period_min=0 is invalid.
		// keep on reset state.
		pwldev_start_reset();
	}
}

#if defined(PWLDEV_INT_USE_MESSAGE)
void capture_cross_zero_pulse(uint8 gpio_id)
{
	uint32 gpio_status;
	gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
	if(gpio_status & BIT(gpio_id))
	{
#if defined(SHINE_DISABLE_INT) /* added macro SHINE_DISABLE_INT */
		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_DISABLE);
#endif /* SHINE_DISABLE_INT */
		system_os_post(PWLDEV_PROCTASK_PRIO, (os_signal_t)SIG_CAPTURE_INT, (os_param_t)0);
	}
	// Clear interrupt status
	GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status);
}
#else
void capture_cross_zero_pulse(uint8 gpio_id)
{
	uint32 gpio_status;
	uint32 cross_zero_period_value = 0;
	gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
	if(gpio_status & BIT(gpio_id))
	{
#if defined(CROSS_ZERO_INT_HILEVEL) /* added macro CROSS_ZERO_INT_HILEVEL */
		if(1 == GPIO_INPUT_GET(GPIO_ID_PIN(CROSS_ZERO_IO_NUM)))
		{
			current_trigger_time = system_get_time();
			if(cross_zero_tick_count++>5)
			{
#if defined(LOG_CROSS_ZERO_TRIGGER) /* added macro LOG_CROSS_ZERO_TRIGGER */
				if(cross_zero_tick_count<CROSS_ZERO_LOG_MAX)
					cross_zero_tick[cross_zero_tick_count] = current_trigger_time;
#endif /* LOG_CROSS_ZERO_TRIGGER */
				cross_zero_period_value = current_trigger_time - last_trigger_time;
				if(cross_zero_period_min)
					cross_zero_period_min = MIN(cross_zero_period_min, cross_zero_period_value);
				else
					cross_zero_period_min = cross_zero_period_value;
				cross_zero_period_max = MAX(cross_zero_period_max, cross_zero_period_value);
			}
			last_trigger_time = current_trigger_time;
//				gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_LOLEVEL);
		}
		else
		{
//				gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
		}
#else /*  */
		current_trigger_time = system_get_time();
		if(cross_zero_tick_count++>5)
		{
#if defined(LOG_CROSS_ZERO_TRIGGER) /* added macro LOG_CROSS_ZERO_TRIGGER */
			if(cross_zero_tick_count<CROSS_ZERO_LOG_MAX)
				cross_zero_tick[cross_zero_tick_count] = current_trigger_time;
#endif /* LOG_CROSS_ZERO_TRIGGER */
			cross_zero_period_value = current_trigger_time - last_trigger_time;
			if(cross_zero_period_min)
				cross_zero_period_min = MIN(cross_zero_period_min, cross_zero_period_value);
			else
				cross_zero_period_min = cross_zero_period_value;
			cross_zero_period_max = MAX(cross_zero_period_max, cross_zero_period_value);
		}
		last_trigger_time = current_trigger_time;

#endif /* CROSS_ZERO_INT_HILEVEL */

#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
		os_timer_disarm(&pwldev_pwm_timer);
		os_timer_setfn(&pwldev_pwm_timer, (os_timer_func_t *)pwldev_check_unload_cb, NULL);
		os_timer_arm(&pwldev_pwm_timer, 100, 0);
#endif /* PRJ_EMH02DE_V1 */
		
	}
	// Clear interrupt status
	GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status);
	
#if defined(CROSS_ZERO_INT_HILEVEL) /* added macro CROSS_ZERO_INT_HILEVEL */
	if(1 == GPIO_INPUT_GET(GPIO_ID_PIN(CROSS_ZERO_IO_NUM)))
	{
		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_LOLEVEL);
	}
	else
	{
		gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
	}
#endif /* CROSS_ZERO_INT_HILEVEL */
}
#endif

// after reset, get the period of cross zero pulse
LOCAL void ICACHE_FLASH_ATTR
pwldev_reset_check_cross_zero(void)
{
	os_timer_disarm(&pwldev_work_timer);
	cross_zero_period_min = 0;
	cross_zero_period_max = 0;
	cross_zero_tick_count = 0;
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
	GPIO_OUTPUT_SET(RESET_IO_NUM, 0);
#endif /* PRJ_EMH02DE_V1 */

	ETS_GPIO_INTR_DISABLE();
	ETS_GPIO_INTR_ATTACH(capture_cross_zero_pulse, CROSS_ZERO_IO_NUM);  // GPIO interrupt handler
#if defined(CROSS_ZERO_INT_HILEVEL) /* added macro CROSS_ZERO_INT_HILEVEL */
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_HILEVEL);
#elif defined(CROSS_ZERO_INT_POSEDGE)
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_POSEDGE);
#else
	gpio_pin_intr_state_set(GPIO_ID_PIN(CROSS_ZERO_IO_NUM), GPIO_PIN_INTR_ANYEDGE);
#endif /* CROSS_ZERO_INT_HILEVEL */
	ETS_GPIO_INTR_ENABLE();

	os_timer_setfn(&pwldev_work_timer, (os_timer_func_t *)pwldev_stop_capture_cross_zero, NULL);
	os_timer_arm(&pwldev_work_timer, PWLDEV_CALCULATE_PERIOD_DELAY, 0);
	
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
	os_timer_disarm(&pwldev_pwm_timer);
	os_timer_setfn(&pwldev_pwm_timer, (os_timer_func_t *)pwldev_check_unload_cb, NULL);
	os_timer_arm(&pwldev_pwm_timer, 100, 0);
#endif /* PRJ_EMH02DE_V1 */
}

// output 10ms high pulse to reset the mosfet
LOCAL void ICACHE_FLASH_ATTR
pwldev_start_reset(void)
{
	EPIT_DBG("%s\n", __func__);
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
	pwldev_set_work_stat(WORK_RESET_STAT);
	GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
	GPIO_OUTPUT_SET(RESET_IO_NUM, 1);
#endif /* PRJ_EMH02DE_V1 */
	os_timer_disarm(&pwldev_work_timer);
	os_timer_setfn(&pwldev_work_timer, (os_timer_func_t *)pwldev_reset_check_cross_zero, NULL);
	os_timer_arm(&pwldev_work_timer, 10, 0);
}

LOCAL void ICACHE_FLASH_ATTR
pwldev_io_init(void)
{	
    PIN_FUNC_SELECT(CROSS_ZERO_IO_MUX, CROSS_ZERO_IO_FUNC);
    GPIO_DIS_OUTPUT(CROSS_ZERO_IO_NUM);
    PIN_FUNC_SELECT(PWM_0_OUT_IO_MUX, PWM_0_OUT_IO_FUNC);
    GPIO_OUTPUT_SET(PWM_0_OUT_IO_NUM, 0);
	
#if defined(PRJ_EMH02DE_V1) /* added macro PRJ_EMH02DE_V1 */
	PIN_FUNC_SELECT(FB_IO_MUX, FB_IO_FUNC);
	GPIO_DIS_OUTPUT(FB_IO_NUM);
	PIN_FUNC_SELECT(RESET_IO_MUX, RESET_IO_FUNC);
	GPIO_OUTPUT_SET(RESET_IO_NUM, 0);
	PIN_FUNC_SELECT(LED_IO_MUX, LED_IO_FUNC);
	GPIO_OUTPUT_SET(LED_IO_NUM, 0);
#endif /* PRJ_EMH02DE_V1 */

}

/******************************************************************************
 * FunctionName : user_ch_aircon_init
 * Description  : light demo init
 * Parameters   : none
 * Returns      : none
*******************************************************************************/
void ICACHE_FLASH_ATTR
pwldev_init(void)
{
	os_memset(&pwldev_setting, 0, sizeof(pwldev_setting));
	pwldev_io_init();
	hw_timer_init(FRC1_SOURCE, 0);	 //NMI_SOURCE
	pwldev_task_init();
	pwldev_start_reset();
	user_set_softap_config();
	user_webserver_init(WEB_SERVER_PORT);
	system_init_done_cb(user_start);
}
#endif